Transistor footprint scaling is rapidly approaching its limits. But this is not about to slow the rapid progress of information processing technology. On the contrary, 3D integration involving new material systems and devices opens a new era with unprecedented promise.
Advances in materials science and engineering are key components of the innovation process. In this four-part series we highlight areas of materials research driving breakthroughs in technology.
Each 2-hour webinar will feature two faculty speakers who will provide complementary perspectives on technology challenges and opportunities and provide an overview of related research activities at MIT. Ten students will also give short presentations on their recent research results, followed by parallel break-out sessions for detailed discussions.
Jewan John Bae comes to MIT Corporate Relations with more than 20 years of experience in the specialty chemicals and construction industries. He facilitates fruitful relationships between MIT and the industry, engaging with executive level managers to understand their business challenges and match them with resources within the MIT innovation ecosystem to help meet their business objectives.
Bae’s areas of expertise include new product commercialization stage gate process, portfolio management & resource planning, and strategic planning. He has held various business leadership positions at W.R. Grace & Co., the manufacturer of high-performance specialty chemicals and materials, including Director of Strategic Planning & Process, Director of Sales in the Americas, and Global Strategic Marketing Director. Bae is a recipient of the US Army Commendation Medal in 1986.
Professor Thompson joined the MIT faculty in 1983. He is Director of MIT’s Materials Research Laboratory and co-Director of the Skoltech Center for Electrochemical Energy Storage. His research interests include processing of thin films and nanostructures for applications in microelectronic, microelectromechanical, and electrochemical systems. Current activities focus on development of thin film batteries for autonomous microsystems, IC interconnect and GaN-based device reliability, and morphological stability of thin films and nano-scale structures. Thompson holds an SB in materials science and engineering from MIT and a PhD in applied physics from Harvard University.
(Carl Thompson video time stamps starts at 3:25)
Eugene A. Fitzgerald is the Merton C. Flemings SMA Professor of Materials Engineering at the Massachusetts Institute of Technology. Building upon his early experience at AT&T Bell Labs which included the invention of high mobility strained silicon, he has created fundamental innovations in stages from early technology to final implementation in the market. His research interests include novel thin film materials and devices. He is founder, co-founder or founding team member of AmberWave Systems Corporation, Contour Semiconductor, 4Power LLC (high efficiency III-V solar on silicon), Paradigm Research LLC, and The Water Initiative. He is co-author of “Inside Real Innovation”, published internationally in January of 2011. He is recipient of the IEEE 2011 Andrew S. Grove Award, the IEEE 2004 EDS George Smith Award, and the TMS 1994 Robert Lansing Hardy Medal Award. He received a BS degree in Materials Science and Engineering in 1985 from MIT and his PhD in the same discipline from Cornell University in 1989.
Mankind’s insatiable desire for connectivity, communication, computation, and improvement in standards of living will continue to drive transitions in integrated circuit technology, as it has done in the past. As increasing transistor density no longer delivers the required value, new directions will appear to build the future integrated circuits that continue to drive these holistic needs. Designing silicon integrated circuits enabled by inserting new devices is such a path of new value. III-V devices have been monolithically integrated into silicon manufacturing processes, demonstrating novel functionality in silicon circuits containing GaN LEDs and GaN transistors. The methods used for monolithic incorporation of III-V devices into silicon ICs are independent of a particular material or device, so such methods could continue to keep silicon great far into the future.
Jesus A. del Alamo is the Donner Professor and Professor of Electrical Engineering at Massachusetts Institute of Technology. He obtained a Telecommunications Engineer degree from the Polytechnic University of Madrid and MS and PhD degrees in Electrical Engineering from Stanford University. From 1985 to 1988 he was with Nippon Telegraph and Telephone LSI Laboratories in Japan and since 1988 he has been with the Department of Electrical Engineering and Computer Science of Massachusetts Institute of Technology. From 2013 until 2019, he served as Director of the Microsystems Technology Laboratories at MIT. His current research interests are focused on nanoelectronics based on compound semiconductors and ultra-wide bandgap semiconductors.
Prof. del Alamo was an NSF Presidential Young Investigator. He is a member of the Royal Spanish Academy of Engineering and Fellow of the Institute of Electrical and Electronics Engineers, the American Physical Society and the Materials Research Society. He is the recipient of the Intel Outstanding Researcher Award in Emerging Research Devices, the Semiconductor Research Corporation Technical Excellence Award, the IEEE Electron Devices Society Education Award, the University Researcher Award by Semiconductor Industry Association and Semiconductor Research Corporation, the IPRM Award and the IEEE Cledo Brunetti Award. He currently serves as Editor-in-Chief of IEEE Electron Device Letters. He is the author of “Integrated Microelectronic Devices: Physics and Modeling” (Pearson 2017, 880 pages), a rigorous and up to date description of transistors and other contemporary microelectronic devices.
Much has been written about “The End of Moore’s Law” for over a decade. The term evokes a picture of stalled computing performance. Reality is far from this doomsday scenario and the outlook of information processing technology appears brighter than ever. Certainly, as transistor footprint scaling is quickly approaching a regime in which “smaller is no longer better,” a radical redirection is mandatory. The new path is the third dimension, piling transistors on top of each other in a 3D construction. The promise goes beyond the integration of more transistors per unit area to keep the economic incentives behind Moore’s Law. The third dimension opens new possibilities to bring together logic and memory and break the “memory wall”, the current bottleneck for system performance. Intimate memory and logic integration will also enable artificial intelligence chips capable of efficiently processing very large data sets. This talk will outline opportunities and challenges for future IC technologies while showcasing relevant MIT research on new materials (i.e. magnetics, interconnects,), devices (i.e. carbon nanotubes transistors, tunnel transistors, neuromorphic devices), process technology (monolithic 3D integration), etc.
As part of the program for this webinar, we are offering breakout discussions with our presenting graduate students and postdocs. In order to participate in these breakout rooms, you will need the latest version of Zoom (version 5.3.2). (If you need help determining your version of Zoom, please follow the instructions here.)
If you do not already have this version, please update your Zoom client/application before joining the discussion. Follow the instructions here to update Zoom.
Topic / Invited Presenter / Position
Title and Abstract
2D electronic materials and devices
Two-dimensional Materials: The Future of Hetergeneous Integration
Layered two-dimensional materials offer unique advantages for heterogeneous integration thanks to their atomically thin body, van der Waals nature of interlayer bonding, relatively low growth temperature and wide range of electronic, optical and mechanical properties. These properties allow seamless back-end-of-the-line integration of novel devices, circuits and systems on a Si CMOS platform to develop complex 3D systems. This combination can not only push the performance limits of existing technologies but also enable new functionalities which current CMOS technologies cannot offer.
Prof. Tomas Palacios
CNT-based 3D systems: integrated sensors and imagers
Heterogeneous Integration of BEOL Logic and Memory in a Commercial Foundry: Carbon Nanotube Logic and Resistive RAM
Monolithic three-dimensional (3D) integration enables revolutionary digital system architectures with vertically-interleaving layers of logic and memories, with dense and fine-grained connectivity. Such monolithic 3D systems promise significant (>100x) energy-efficiency improvements over conventional two-dimensional systems. Here we show BEOL integration of multi-tier carbon nanotube field-effect transistor logic and Resistive RAM within a commercial foundry at a 130 nm technology node. We also fabricate and experimentally validate a wide range of digital systems (3D imager, RISC-V microprocessor etc). All design and fabrication is VLSI-compatible and leverages existing silicon CMOS infrastructure.
Prof. Max Shulaker
Modern Microprocessor Built from Complementary Carbon Nanotube Transistors
Electronics is approaching a major paradigm shift because silicon transistor scaling no longer yields historical energy-efficiency benefits, spurring research towards beyond-silicon nanotechnologies. In particular, carbon nanotube field-effect transistor (CNFET)-based digital circuits promise substantial energy-efficiency benefits, but the inability to perfectly control nanoscale defects and variability in carbon nanotubes has precluded the realization of very-large-scale integrated systems. Here we overcome these challenges to demonstrate a beyond-silicon microprocessor built entirely from CNFETs. The microprocessor runs standard 32-bit RISC-V instructions on 16-bit data and addresses, comprises more than 14,000 complementary CNFETs and is designed and fabricated using industry-standard design flows and processes
Graphene Enabled Remote Epitaxy
Artificial single-crystaline heterostructures enabled by "remote epitaxy"
Epitaxy has been the driving force of the semiconductor industry, which allows creation of high quality single-crystalline materials that become the base of advanced electronic and photonic devices. However, epitaxy occurs on thick and rigid substrates and also require materials to be grown on wafers with similar lattice constants, which limit the possible material selections as well as prevent integration of highly dissimilar single-crystalline materials together on a single platform. Here, we solve these issues by developing a method, called remote epitaxy, which allow epitaxial growth and exfoliation of single-crystalline membranes on graphene coated substrates that allow epitaxial lift-off of a variety of compound-semiconductor materials and complex-oxides that can be easily heterointegrated onto a single platform.
Prof. Jeehwan Kim
Neuromorphic proton-based devices
Energy-Efficient Hardware for Brain-inspired Computing: Artificial Synapses Based on Proton and Oxygen Motion
Hardware neural networks that combine processing and memory in a single architecture are a promising approach for reducing the energy consumption and computation time of machine learning algorithms. However, current devices are limited by high variability and low yield. Our group is developing two all solid-state approaches to mitigating these issues. One is a protonic electrochemical synapse that changes conductivity deterministically by current-controlled shuffling of dopant protons across the active device layer. The second is controlling conducting oxygen vacancy filament formation in resistive memory devices via dopant and microstructure engineering. Both approaches provide a potential path towards brain-inspired neuromorphic computing.
Prof. Bilge Yildiz
Li-based Neuromorphic Materials and Devices
Building Neuromorphic Computing Units with Li-based Battery Materials
Specialized hardware for neural networks requires materials with tunable symmetry, retention and speed at low power consumption. Here, we propose lithium titanates, originally developed as Li-ion battery anode materials, as promising candidates for memristive-based neuromorphic computing hardware. We investigate the controlled formation of a metallic phase (Li7Ti5O12) percolating through an insulating medium (Li4Ti5O12) with no volume changes under voltage bias, thereby controlling the spatially averaged conductivity of the device. We present a theoretical model to explain the observed hysteretic switching behavior based on electrochemical nonequilibrium thermodynamics, in which the metal-insulator transition results from electrically driven phase separation of Li4Ti5O12 and Li7Ti5O12.
Prof. Jennifer Rupp
Integrated Thin-Film Batteries
High Capacity CMOS-compatible Thin Film Li-ion Batteries
The miniaturization of sensors through advancements in low-powered MEMS devices in integrated circuits has opened up new opportunities for thin film microbatteries. However, many of the available thin film battery materials require a high-temperature process that necessitates additional packaging volume, reducing their overall energy density. We have identified and demonstrate an all-solid-state materials system with high volumetric capacity that exclusively utilizes room temperature processes, allowing for integration of thin film batteries directly onto CMOS circuits for applications in distributed power supplies and integrated autonomous microsystems.
Prof. Carl V. Thompson
Growth of 2D Materials for Electronics
Low Temperature Synthesis of High Quality MoS2
The large-area synthesis of high-quality MoS2 plays an important role in realizing industrial applications of optoelectronics, nanoelectronics, and flexible devices. However, current techniques for chemical vapor deposition (CVD)-grown MoS2 require a high synthetic temperature and a transfer process. Here, we report the direct synthesis of high-quality monolayer MoS2 with the domain size up to 120 μm by metal-organic chemical vapor deposition (MOCVD) at a temperature of 320 oC. Owing to the low substrate temperature, the MOCVD-grown MoS2 exhibits low impurity doping and nearly unstrained properties, demonstrating enhanced electronic performance with high electron mobility of 68.3 cm2 V-1s-1 at room temperature.
Prof. Jing Kong
Ferroelectric materials for steep-subthreshold CMOS
Dynamics of HfZrO2 Ferroelectric Structures for Advanced Electronics: Experiments and Models
Negative capacitance (NC) effect by incorporating a ferroelectric (FE) HfZrO2 layer in the gate stack of a MOSFET has attracted substantial interest. This is due to its potential for achieving a steep subthreshold swing to overcome the CMOS scaling limit. However, NC and FE dynamics are still contentious and unclear. Therefore, we are investigating the switching dynamics of the Metal-FE HfZrO2-Metal structure by calibrating and minimizing circuit and sample parasitics. In this work, our new dynamic model based on the Preisach model describes well all observed behavior in a wide range of conditions.
Prof. Jesus del Alamo
Quantum computing technology I
Hybrid superconducting circuits based on van der Waals heterostructures
Van der Waals (vdW) materials – a family of layered crystals with various functionalities, can be assembled in specific arrangements to create new electronic devices called vdW heterostructures. The electronic properties of these heterostructures, in combination with their epitaxial precision, make vdW-based devices a promising alternative for constructing key elements of solid-state quantum computing platforms. We will discuss a voltage-tunable transmon qubit made with graphene-based vdW heterostructures, whose spectrum reflects the electronic properties of massless Dirac fermions traveling ballistically. We also study hexagonal boron nitride (hBN), a layered, dielectric crystal, in the microwave regime by integrating the material in a superconducting LC resonator to extract its microwave loss tangent.
Prof. William Oliver
Quantum computing technology II
Waveguide Quantum Electrodynamics with Giant Superconducting Artificial Atoms
Layered two-dimensional materials offer unique advantages for heterogeneous integration thanks to their atomically thin body, van der Waals nature of interlayer bonding, relatively low growth temperature and wide range of electronic, optical and mechanical properties. The transferable nature of these materials and the low thermal budget of their processing technology allows seamless back end of the line integration of novel devices, circuits and systems on CMOS platform to develop complex 3D systems that can not only push the performance limits of the existing technologies but also enable new functionalities which current CMOS technologies cannot offer.
3D IC Thermal Management
Tailored Optimization of Advanced Thermal Management Technologies for Hgh Performance Electronic Devices
Thermal management is a severe challenge for GaN technology and other high-performance electronics. Power densities surpassing 1-2 kW/cm2 result in localized hot spots that traditional cooling strategies cannot efficiently mitigate. We developed fast and accurate thermal models for state-of-the-art thermal management technologies that efficiently dissipate heat via evaporative cooling and ultra-low resistance to vapor transport. While many thermal models are limited to simplistic power loads, our models facilitate accurate thermal co-design by rapidly calculating temperature profiles of realistic processors. Further, we designed a machine learning model that selects optimal evaporator geometries and coolants to minimize the peak device temperature.
Prof. Evelyn Wang