Prof. Jeehwan Kim

Class of 1947 Career Development Associate Professor of Mechanical Engineering

Primary DLC

Department of Mechanical Engineering

MIT Room: 38-276

Areas of Interest and Expertise

Nanoscale Thin Film Mechanics/Devices
Graphene-Based Wafer-Scale Device Exfoliation/Transfer for Wearable Electronics
Wafer-Scale Single-Crystalline 2D Materials
Atomic-Precision 2D Material Manipulation
Dislocation/Crack Engineering for Advanced Nanoelectronics
Heteroepitaxy/van der Waals Epitaxy
Advanced Photovoltaics
Three-Dimensional Solar Cell Architectures
Mechanical Exfoliation of Solar Cells
Organic/Inorganic Hybrid sSolar Cells

Recent Work

  • Video

    2022-Japan-Jeehwan-Kim

    January 20, 2022Conference Video Duration: 34:8
    Jeehwan Kim
    Associate Professor, MIT Mechanical Engineering

    10.2021-Sense.nano-Jeehwan-Kim

    October 25, 2021Conference Video Duration: 18:37
    Jeehwan Kim | Associate Professor, MIT Mechanical Engineering

    10.2021-Sense.nano-Session 1-Movement-Motion-Q-A

    October 25, 2021Conference Video Duration: 24:11

    Brian Anthony | Associate Director, MIT.nano Ellen Roche
    Associate Professor, MIT Mechanical Engineering
    Jeehwan Kim
    Associate Professor, MIT Mechanical Engineering Neville Hogan
    Professor, MIT Mechanical Engineering; Professor, MIT Brian & Cognitive Sciences

    Jeehwan Kim

    January 21, 2021MIT Faculty Feature Duration: 16:57

    Associate Professor of Mechanical Engineering
    Principal Investigator, Research Laboratory of Electronics

    Jeehwan Kim - 2017 Japan

    January 27, 2017Conference Video Duration: 35:41

    Extremely cost-effective semiconductor layer-transfer process via graphene & Highly uniform advanced RRAM

    As a strategy to save the cost of expensive substrates in semiconductor processing, the technique called “layer-transfer” has been developed. In order to achieve real cost-reduction via the “layer-transfer”, the following needs to be insured: (1) Reusability of the expensive substrate, (2) Minimal substrate refurbishment step after the layer release, (3) Fast release rate, and (4) Precise control of a released interface. Although a number of layer transfer methods have been developed including chemical lift-off, optical lift-off, and mechanical lift-off, none of those three methods fully satisfies conditions listed above. In this talk, we will discuss our recent development in a “graphene-based layer-transfer” process that could fully satisfy the above requirements, where epitaxial graphene can serve as a universal seed layer to grow single-crystalline GaN, III-V, II-VI and IV semiconductor films and a release layer that allows precise and repeatable release at the graphene surface. We will further discuss about cost-effective, defect-free heterointergration of semiconductors using graphene-based layer transfers.

    Lastly, I will introduce our new research activities in developing advanced RRAM devices. Resistive switching devices have attracted tremendous attention due to their high endurance, sub-nanosecond switching, long retention, scalability, low power consumption, and CMOS compatibility. RRAMs have also emerged as a promising candidate for non-Von Neumann computing architectures based on neuromorphic and machine learning systems to deal with “big data” problems such as pattern recognition from large amounts of data sets. However, currently reported RRAM devices have not shown uniform switching behaviors across the devices with high on-off ratio which holds up commercialization of RRAM-based data storages as well as demonstration of large-scale neuromorphic functions. Recently, we redesigned RRAM devices and this new device structure exhibits most of functions required for large-array memories and neuromorphic computing, which are (1) excellent retention with high endurance, (2) excellent device uniformity, (3) high on/off current ratio, and (4) current suppression in low voltage regime. I will discuss about the characterization results of this new RRAM device.