Skip to main content

MIT Corporate Relations

MIT Corporate Relations
MIT Logo
  • Read
  • Watch
  • Attend
  • About
  • Connect
  • MIT Startup Exchange
Search
  • Sign-In
  • Register
MIT ILP Home
  • Read
    • Faculty Features
    • Research
    • News
  • Watch
  • Attend
    • Conferences
    • Webinars
    • Learning Opportunities
  • About
    • Membership
    • Staff
    • For Faculty
  • Connect
    • Faculty/Researchers
    • Program Directors
  • MIT Startup Exchange
User Menu and Search
  • Sign-In
  • Register
MIT ILP Home
Toggle menu
  • Sign-in
  • Register
  • Read
    • Faculty Features
    • Research
    • News
  • Watch
  • Attend
    • Conferences
    • Webinars
    • Learning Opportunities
  • About
    • Membership
    • Staff
    • For Faculty
  • Connect
    • Faculty/Researchers
    • Program Directors
  • MIT Startup Exchange

Search Results


Filter Results
  • Show:
  • 10
  • 50
  • 100

Filter Results

Narrow your results
  • News (283)
  • Videos (460)
  • Events (147)
  • Research (308)
  • Faculty (321)
  • Members (1)
1536 search results found
  • Christian
    Catalini

    Theodore T Miller (1922) Career Development Associate Professor
    Primary DLC
    MIT Sloan School of Management

    Contact

    MIT Room
    E62-480
    Phone
    (617) 253-6727
    catalini@mit.edu
  • 12.1.20 Josue Velazquez

    December 1, 2020Conference Video Duration: 32:2

    Josué C. Velázquez

    Research Scientist at the MIT Center for Transportation and Logistics

  • Ivan
    Celanovic

    Principal Research Scientist
    Primary DLC
    Institute for Soldier Nanotechnologies

    Contact

    MIT Room
    NE47-427
    Phone
    (617) 253-5022
    ivanc@mit.edu
  • Marcelo
    Coelho

    Associate Professor of the Practice
    Primary DLC
    Department of Architecture

    Contact

    MIT Room
    N52-373H
    Phone
    (857) 928-1874
    marceloc@mit.edu
  • SMR-Logo
    May 4, 2020

    Designing AI systems that customers won't hate

  • SMR-Logo
    March 7, 2016

    What High-Potential Young Managers Want

  • Aragao

    Jeehwan Kim - 2017 ICT Conference

    April 12, 2017Conference Video Duration: 41:34

    Extremely cost-effective semiconductor layer-transfer process via graphene & Highly uniform advanced RRAM

    As a strategy to save the cost of expensive substrates in semiconductor processing, the technique called “layer-transfer” has been developed. In order to achieve real cost-reduction via the “layer-transfer”, the following needs to be insured: (1) Reusability of the expensive substrate, (2) Minimal substrate refurbishment step after the layer release, (3) Fast release rate, and (4) Precise control of a released interface. Although a number of layer transfer methods have been developed including chemical lift-off, optical lift-off, and mechanical lift-off, none of those three methods fully satisfies conditions listed above. In this talk, we will discuss our recent development in a “graphene-based layer-transfer” process that could fully satisfy the above requirements, where epitaxial graphene can serve as a universal seed layer to grow single-crystalline GaN, III-V, II-VI and IV semiconductor films and a release layer that allows precise and repeatable release at the graphene surface. We will further discuss about cost-effective, defect-free heterointergration of semiconductors using graphene-based layer transfers.

    Lastly, I will introduce our new research activities in developing advanced RRAM devices. Resistive switching devices have attracted tremendous attention due to their high endurance, sub-nanosecond switching, long retention, scalability, low power consumption, and CMOS compatibility. RRAMs have also emerged as a promising candidate for non-Von Neumann computing architectures based on neuromorphic and machine learning systems to deal with “big data” problems such as pattern recognition from large amounts of data sets. However, currently reported RRAM devices have not shown uniform switching behaviors across the devices with high on-off ratio which holds up commercialization of RRAM-based data storages as well as demonstration of large-scale neuromorphic functions. Recently, we redesigned RRAM devices and this new device structure exhibits most of functions required for large-array memories and neuromorphic computing, which are (1) excellent retention with high endurance, (2) excellent device uniformity, (3) high on/off current ratio, and (4) current suppression in low voltage regime. I will discuss about the characterization results of this new RRAM device.

    2017 MIT Information and Communication Technologies Conference
  • John Hansman

    Jeehwan Kim - 2017 Japan

    January 27, 2017Conference Video Duration: 35:41

    Extremely cost-effective semiconductor layer-transfer process via graphene & Highly uniform advanced RRAM

    As a strategy to save the cost of expensive substrates in semiconductor processing, the technique called “layer-transfer” has been developed. In order to achieve real cost-reduction via the “layer-transfer”, the following needs to be insured: (1) Reusability of the expensive substrate, (2) Minimal substrate refurbishment step after the layer release, (3) Fast release rate, and (4) Precise control of a released interface. Although a number of layer transfer methods have been developed including chemical lift-off, optical lift-off, and mechanical lift-off, none of those three methods fully satisfies conditions listed above. In this talk, we will discuss our recent development in a “graphene-based layer-transfer” process that could fully satisfy the above requirements, where epitaxial graphene can serve as a universal seed layer to grow single-crystalline GaN, III-V, II-VI and IV semiconductor films and a release layer that allows precise and repeatable release at the graphene surface. We will further discuss about cost-effective, defect-free heterointergration of semiconductors using graphene-based layer transfers.

    Lastly, I will introduce our new research activities in developing advanced RRAM devices. Resistive switching devices have attracted tremendous attention due to their high endurance, sub-nanosecond switching, long retention, scalability, low power consumption, and CMOS compatibility. RRAMs have also emerged as a promising candidate for non-Von Neumann computing architectures based on neuromorphic and machine learning systems to deal with “big data” problems such as pattern recognition from large amounts of data sets. However, currently reported RRAM devices have not shown uniform switching behaviors across the devices with high on-off ratio which holds up commercialization of RRAM-based data storages as well as demonstration of large-scale neuromorphic functions. Recently, we redesigned RRAM devices and this new device structure exhibits most of functions required for large-array memories and neuromorphic computing, which are (1) excellent retention with high endurance, (2) excellent device uniformity, (3) high on/off current ratio, and (4) current suppression in low voltage regime. I will discuss about the characterization results of this new RRAM device.

  • SMR-Logo
    July 27, 2020

    Why Smart Companies are Giving Customers More Data

  • SMR-Logo
    May 13, 2021

    How temporary assignments boost innovation

Pagination

  • of 154
  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
  • 129
  • 130
  • 131
  • 132
  • 133
  • 134
  • 135
  • 136
  • 137
  • 138
  • 139
  • 140
  • 141
  • 142
  • 143
  • 144
  • 145
  • 146
  • 147
  • 148
  • 149
  • 150
  • 151
  • 152
  • 153
  • 154
  • Next page

Sign up to receive news and updates from MIT Industrial Liaison Program Sign up

  • Read
    • Faculty Features
    • Research
    • News
  • Watch
  • Attend
    • Conferences
    • Webinars
    • Learning Opportunities
  • About
    • Membership
    • Staff
    • For Faculty
  • Connect
    • Faculty/Researchers
    • Program Directors
  • MIT Startup Exchange
  • LinkedIn
  • YouTube
  • Twitter
Home

1 Main Street
12th Floor, E90-1201

Cambridge, MA 02142

Privacy Policy

Accessibility

ask-ilp@mit.edu

MIT OCR Logo