Principal Investigator Jesus del Alamo
InGaAs is a promising candidate as channel material for CMOS technologies beyond the 7 nm node. In this dimensional range, only high aspect-ratio (AR) 3-D tran- sistors with a fin or nanowire configuration can deliver the necessary performance. Impressive InGaAs FinFET prototypes have been demonstrated recently. However, as the fin width is scaled down to 10 nm, severe ON-cur- rent degradation is observed. The origin of this perfor- mance degradation is largely related to the quality of the high-K/semiconductor interface at the fin sidewalls.
One of the key process technologies to improve the interface quality is digital etch (DE). DE is a self- limiting etching process that consists of dry oxidation of the semiconductor surface and wet etch of the oxide. This process allows for the accurately scaling down of the fin width and smoothing the sidewalls. Digital etch is also the last process step before the gate oxide is deposited over the fins. It. Therefore, plays a crucial role in surface preparation and holds the key for further improvements to device transport and electrostatics.
In this work, we compare the electrical performance of two identical sets of InGaAs FinFETs processed side-by-side that differ only in the type of digital etch that is applied. In one case, the oxide removal step was accomplished using H2SO4, in the other, HCl was used. The starting material consists of 50 nm thick (HC) moderately-doped InGaAs channel layer on top of InAlAs buffer (both lattices matched to InP). Fins are first patterned using E-beam lithography and RIE etched. After this, four cycles of digital etch are applied. Then, the gate dielectric composed of 3 nm HfO2 is deposited by Atomic Layer Deposition. and Mo is sputtered as gate metal and patterned by RIE. In this process, the HSQ that defines the fin etch is kept in place. This makes our FinFETs double-gate transistors with carrier modulation only on the fin sidewalls. The device is finished by via opening and ohmic contact and pad deposition. Transmission Electron Microscopy is used to verify that the fin shape and dimensions are similar in both samples.
Well-behaved characteristics and good sidewall control are obtained in both types of devices. There are a few notable differences. In the OFF state, the HCl sample shows lower gate leakage but larger subthreshold swing compared to the H2SO4 sample. This suggests that HCl treatment results in a higher interface state density (Dit) toward the valence band. In the ON state, however, the intrinsic transconductance, gm,i, exhibits a peculiar trend. For wide fins, the HCl sample shows higher performance but in very narrow fins (Wf<20 nm), H2SO4 performs better. This implies that HCl yields a higher mobility but lower carrier concentration at comparable overdrive. For aggressively scaled fins, the carrier concentration in the fin becomes comparable to Dit, and, as a result, the intrinsic gm of H2SO4 sample (with a lower Dit toward the conduction band) prevails.