Entry Date:
January 24, 2019

Vertical Gallium Nitride Power Diodes on Silicon Substrates

Principal Investigator Tomas Palacios


Vertical gallium nitride (GaN) devices are excellent candidates for next-generation power electronics. However, their commercialization has been hindered so far by the high cost and small diameter of GaN substrates. GaN vertical devices on low-cost silicon (Si) substrates are therefore highly desired, as they could allow for at least 50-to-100-fold lower wafer and epitaxy costs as well as the possibility of processing on 8-inch Si substrates. However, the insulating buffer layers typically found on GaN-on-Si wafers make it challenging to realize vertical current conduction.

Since 2014, we have developed three generations of vertical GaN-on-Si power diodes. The first generation utilized a quasi-vertical structure, where the anode and cathode are placed on a mesa step on the same wafer side. We then demonstrated fully-vertical diodes by flip-chip-bonding the GaN-on-Si wafer to another Si wafer followed by the removal of insulating buffer layers. Recently, a novel technology was developed for making fully-vertical diodes. Si substrate and buffer layers were selectively removed, and the bottom cathode was formed in the backside trenches. A specific differential on-resistance of 0.35 m-omega * cm2 and a breakdown voltage of 720 V were both demonstrated, setting a new record performance in all vertical GaN power diodes on foreign substrates.