Entry Date:
January 22, 2019

Sub-10 nm Diameter InGaAs Vertical Nanowire MOSFETs

Principal Investigator Eugene Fitzgerald

Co-investigator Jesus del Alamo


In future logic technology for the Internet of Things and mobile applications, reducing transistor power consumption is of paramount importance. Transistor technologies based on III-V materials are widely considered as a leading solution to lower power dissipation by enabling dramatic reductions in the transistor supply voltage. Ver- tical nanowire (VNW) transistor technology holds prom- ise as the ultimately scalable device architecture.

In this work, we present the smallest vertical nanowire transistors of any kind in any semiconductor system. These devices are sub-10 nm diameter InGaAs VNW metal–oxide–semiconductor field-effect transistors (MOSFETs).They are fabricated by a top-down approach, using reactive ion etching, alcohol-based digital etch, and Ni alloyed contacts. A record ON current of 350 μA/ μm at OFF current of 100 nA/μm and supply voltage of 0.5 V is obtained in a 7 nm diameter device. The same device exhibits a peak transconductance of 1.7 mS/μm and minimal subthreshold swing of 90 mV/dec at a drain voltage of 0.5 V. This yields the highest quality factor (defined as the ratio between transconductance and subthreshold swing) of 19 reported in vertical nanowire transistors. Excellent scaling behavior is observed with peak transconductance and ON current increasing as the diameter is shrunk down to 7 nm. The performance of our devices exceeds that of the best Si/ Ge transistor by a factor of two at half the supply voltage.