10.14.20-MRL-After-Moores-delAlamo

Conference Video|Duration: 26:30
October 14, 2020
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  • Video details
    Much has been written about “The End of Moore’s Law” for over a decade. The term evokes a picture of stalled computing performance. Reality is far from this doomsday scenario and the outlook of information processing technology appears brighter than ever. Certainly, as transistor footprint scaling is quickly approaching a regime in which “smaller is no longer better,” a radical redirection is mandatory. The new path is the third dimension, piling transistors on top of each other in a 3D construction. The promise goes beyond the integration of more transistors per unit area to keep the economic incentives behind Moore’s Law. The third dimension opens new possibilities to bring together logic and memory and break the “memory wall”, the current bottleneck for system performance. Intimate memory and logic integration will also enable artificial intelligence chips capable of efficiently processing very large data sets. This talk will outline opportunities and challenges for future IC technologies while showcasing relevant MIT research on new materials (i.e. magnetics, interconnects,), devices (i.e. carbon nanotubes transistors, tunnel transistors, neuromorphic devices), process technology (monolithic 3D integration), etc.
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  • Video details
    Much has been written about “The End of Moore’s Law” for over a decade. The term evokes a picture of stalled computing performance. Reality is far from this doomsday scenario and the outlook of information processing technology appears brighter than ever. Certainly, as transistor footprint scaling is quickly approaching a regime in which “smaller is no longer better,” a radical redirection is mandatory. The new path is the third dimension, piling transistors on top of each other in a 3D construction. The promise goes beyond the integration of more transistors per unit area to keep the economic incentives behind Moore’s Law. The third dimension opens new possibilities to bring together logic and memory and break the “memory wall”, the current bottleneck for system performance. Intimate memory and logic integration will also enable artificial intelligence chips capable of efficiently processing very large data sets. This talk will outline opportunities and challenges for future IC technologies while showcasing relevant MIT research on new materials (i.e. magnetics, interconnects,), devices (i.e. carbon nanotubes transistors, tunnel transistors, neuromorphic devices), process technology (monolithic 3D integration), etc.
Locked Interactive transcript