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2246 search results found
  • Aragao

    Jeehwan Kim - 2017 ICT Conference

    April 12, 2017Conference Video Duration: 41:34

    Extremely cost-effective semiconductor layer-transfer process via graphene & Highly uniform advanced RRAM

    As a strategy to save the cost of expensive substrates in semiconductor processing, the technique called “layer-transfer” has been developed. In order to achieve real cost-reduction via the “layer-transfer”, the following needs to be insured: (1) Reusability of the expensive substrate, (2) Minimal substrate refurbishment step after the layer release, (3) Fast release rate, and (4) Precise control of a released interface. Although a number of layer transfer methods have been developed including chemical lift-off, optical lift-off, and mechanical lift-off, none of those three methods fully satisfies conditions listed above. In this talk, we will discuss our recent development in a “graphene-based layer-transfer” process that could fully satisfy the above requirements, where epitaxial graphene can serve as a universal seed layer to grow single-crystalline GaN, III-V, II-VI and IV semiconductor films and a release layer that allows precise and repeatable release at the graphene surface. We will further discuss about cost-effective, defect-free heterointergration of semiconductors using graphene-based layer transfers.

    Lastly, I will introduce our new research activities in developing advanced RRAM devices. Resistive switching devices have attracted tremendous attention due to their high endurance, sub-nanosecond switching, long retention, scalability, low power consumption, and CMOS compatibility. RRAMs have also emerged as a promising candidate for non-Von Neumann computing architectures based on neuromorphic and machine learning systems to deal with “big data” problems such as pattern recognition from large amounts of data sets. However, currently reported RRAM devices have not shown uniform switching behaviors across the devices with high on-off ratio which holds up commercialization of RRAM-based data storages as well as demonstration of large-scale neuromorphic functions. Recently, we redesigned RRAM devices and this new device structure exhibits most of functions required for large-array memories and neuromorphic computing, which are (1) excellent retention with high endurance, (2) excellent device uniformity, (3) high on/off current ratio, and (4) current suppression in low voltage regime. I will discuss about the characterization results of this new RRAM device.

    2017 MIT Information and Communication Technologies Conference
  • John Hansman

    Jeehwan Kim - 2017 Japan

    January 27, 2017Conference Video Duration: 35:41

    Extremely cost-effective semiconductor layer-transfer process via graphene & Highly uniform advanced RRAM

    As a strategy to save the cost of expensive substrates in semiconductor processing, the technique called “layer-transfer” has been developed. In order to achieve real cost-reduction via the “layer-transfer”, the following needs to be insured: (1) Reusability of the expensive substrate, (2) Minimal substrate refurbishment step after the layer release, (3) Fast release rate, and (4) Precise control of a released interface. Although a number of layer transfer methods have been developed including chemical lift-off, optical lift-off, and mechanical lift-off, none of those three methods fully satisfies conditions listed above. In this talk, we will discuss our recent development in a “graphene-based layer-transfer” process that could fully satisfy the above requirements, where epitaxial graphene can serve as a universal seed layer to grow single-crystalline GaN, III-V, II-VI and IV semiconductor films and a release layer that allows precise and repeatable release at the graphene surface. We will further discuss about cost-effective, defect-free heterointergration of semiconductors using graphene-based layer transfers.

    Lastly, I will introduce our new research activities in developing advanced RRAM devices. Resistive switching devices have attracted tremendous attention due to their high endurance, sub-nanosecond switching, long retention, scalability, low power consumption, and CMOS compatibility. RRAMs have also emerged as a promising candidate for non-Von Neumann computing architectures based on neuromorphic and machine learning systems to deal with “big data” problems such as pattern recognition from large amounts of data sets. However, currently reported RRAM devices have not shown uniform switching behaviors across the devices with high on-off ratio which holds up commercialization of RRAM-based data storages as well as demonstration of large-scale neuromorphic functions. Recently, we redesigned RRAM devices and this new device structure exhibits most of functions required for large-array memories and neuromorphic computing, which are (1) excellent retention with high endurance, (2) excellent device uniformity, (3) high on/off current ratio, and (4) current suppression in low voltage regime. I will discuss about the characterization results of this new RRAM device.

  • Vivienne
    Sze

    Professor of Electrical Engineering and Computer Science
    Primary DLC
    Microsystems Technology Laboratories

    Contact

    MIT Room
    38-260
    Phone
    (617) 324-7352
    sze@mit.edu

    Assistant

    Assistant Name
    Janice Balzer
    Assistant phone number
    (617) 253-7349
    balzer@mit.edu
  • 4.12.22-Health-Science-Braatz-Nguyen

    April 12, 2022Conference Video Duration: 26:23
    Richard Braatz
    Gilliland Professor, Chemical Engineering
    Faculty Research Officer
    Tam Nguyen
    Ph.D. student in chemical engineering at MIT
  • 2019 Management

    2021 MIT Innovations in Management Conference

    September 22 - 23, 2021 Conference
    MIT Samberg Conference Center

    Once the disruption of the pandemic settles, successful leaders need to address pressing issues in challenging, different fronts amidst an exponentially changing world. CEOs must face unprecedented demands from the their company’s workforce, customers, Board, investors, suppliers, and regulators, and must answer the questions at hand. How will we measure and improve corporate culture? How can we can shape the technologies transforming work? What is the future of eCommerce and omnichannel strategies? How do we assign decision rights for organizational acceleration? How will organizations systematically innovate and build technology organizations? How will organizations successfully implement hybrid work environments? Join us to hear from MIT faculty and MIT Startup Exchange entrepreneurs to learn how to navigate this new era with management best practices.

  • Ernest
    Fraenkel

    Grover M Hermann Professor in Health Sciences and Technology
    Primary DLC
    Department of Biological Engineering

    Contact

    MIT Room
    16-241
    Phone
    (617) 258-8702
    fraenkel@mit.edu
  • Oleta
    Johnson

    William R (1964) and Daniel L (1995) Young Assistant Professor of Chemistry
    Primary DLC
    Department of Chemistry

    Contact

    MIT Room
    18-481
    otjohn@mit.edu

    Assistant

    Assistant Name
    Jeff Taft
    Assistant phone number
    (617) 253-3037
    jmtaft@mit.edu
  • Cesar
    Moreno
    Terrer

    Class of 1958 Career Development Assistant Professor of Civil and Environmental Engineering
    Primary DLC
    Department of Civil and Environmental Engineering

    Contact

    MIT Room
    48-329
    cterrer@mit.edu
  • Dame Fiona
    E
    Murray

    Associate Dean for Innovation & Inclusion
    Primary DLC
    MIT Sloan School of Management

    Contact

    MIT Room
    E62-488
    Phone
    (617) 258-0628
    fmurray@mit.edu

    Assistant

    Assistant Name
    Danielle Tarpley
    Assistant phone number
    (617) 324-9702
    dchajin@mit.edu
  • 2020 Japan - Startups

    January 31, 2020Conference Video Duration: 54:9

    MIT Startup Exchange actively promotes collaboration and partnerships between MIT-connected startups and industry. Qualified startups are those founded and/or led by MIT faculty, staff, or alumni, or are based on MIT-licensed technology. Industry participants are principally members of MIT’s Industrial Liaison Program (ILP).

    MIT Startup Exchange is a community of over 1,800 MIT-connected startups with roots across MIT departments, labs and centers; it hosts a robust schedule of startup workshops and showcases, and facilitates networking and introductions between startups and corporate executives.

    STEX25 is a startup accelerator within MIT Startup Exchange, featuring 25 “industry ready” startups that have proven to be exceptional with early use cases, clients, demos, or partnerships, and are poised for significant growth. STEX25 startups receive promotion, travel, and advisory support, and are prioritized for meetings with ILP’s 260 member companies.

    MIT Startup Exchange and ILP are integrated programs of MIT Corporate Relations.

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