Entry Date:
May 3, 2018

Development of a Tabletop Fabrication Platform for MEMS Research, Development and Production

Principal Investigator Evelyn Wang


A general rule of thumb for new semiconductor fabrica- tion facilities (Fabs) is that revenues from the first year of production must match the capital cost of building the fab itself. With modern fabs routinely exceeding $1 billion to build, this rule serves as a significant barrier to entry for research and development and for groups seeking to commercialize new semiconductor devic- es aimed at smaller market segments and requiring a dedicated process. To eliminate this cost barrier, we are working to create a suite of tools that will process small (~1”) substrates and cumulatively cost less than $1 million. This suite of tools, known colloquially as the 1” Fab, offers many advantages over traditional fabs. By shrinking the size of the substrate, we trade high die throughputs for significant capital cost savings, as well as substantial savings in material usage and energy consumption. This substantial reduction in the capital cost will drastically increase the availability of semiconduc- tor fabrication technology and enable experimentation, prototyping, and small-scale production to occur locally and economically.

Research in the last few years has been primarily focused on developing and characterizing tools for the 1” Fab. In previous years, we demonstrated a deep reactive ion etching (DRIE) tool and a corresponding modular vacuum tool architecture and we are now working to develop a reactive magnetron sputtering tool and an inductively coupled plasma-based PECVD tool (ICP-CVD) for depositing a wide variety of materials. The reactive magnetron sputtering tools operates using a 2” target and a direct sputtering configuration and is fully integrable with the modular tool architecture of the 1” Fab. We have demonstrated the functionality of the tool with the depositions of copper, aluminum, and via reactive sputtering, aluminum nitride. The system has been characterized using a response surface methodology and consistent, uniform depositions with <6% variation across the wafer have been shown. The ICP-CVD tool has also been built within the modular tool architecture and is being tested with depositions of SiO2, SiNx, and a-Si. The use of an ICP source allows depositions to occur at temperatures as low as 25°C, with low hydrogen incorporation, and quality approaching that of LPCVD depositions. Film stress and index of refraction are also controllable.