Cold cathodes based on silicon field emitter arrays (FEAs) have shown promising potential in a variety of applications requiring high current density electron sources. However, FEAs face a number of challenges that have prevented them from achieving widespread use in commercial and military applications. One problem limiting the reliability of FEAs is emitter tip burnout due to Joule heating. The current fabrication process for FEAs results in a non-uniform distribution of emitter tip radii. At a fixed voltage, emitters with a small radius emit a higher current while emitters with a large radius emit a lower current. Therefore, emitters with a small radius reach their thermal limit due to Joule heating at lower voltages and consequently burnout. Previous solutions to mitigating tip burnout have focused on limiting the emitter current with resistors, transistors, or nanowires in order to obtain more uniform emission current.
In this project, we focus on increasing the uniformity of emitter tip radii as a means to reduce tip burnout. We how a typical distribution of emitter tip radii for FEAs. The non-uniform distribution of emitter tip radii first forms during the photolithography step that defines the array of “dots” which become the etching mask for the silicon tips. In our FEA fabrication process, we use a tri-level resist process that nearly eliminates the light wave reflected at the photoresist/silicon interface, and hence improves the uniformity of the dot diameter. Furthermore, we integrate the emitter tips with silicon nanowires to improve their reliability. We also show a diagram of the fabricated structure. We expect our fabrication process to result in FEAs with more uniform emission current and potentially longer lifetime.