After Moore's Law (Repeat)

^{Room #}

^{Topic / Invited Presenter / Position}

^{Title and Abstract}

^Supervisor

^{Room 1}

^{2D electronic materials and devices}

^{Ahmad Zubair}

^{Post Doc}

^{Two-dimensional Materials: The Future of Hetergeneous Integration
Layered two-dimensional materials offer unique advantages for heterogeneous integration thanks to their atomically thin body, van der Waals nature of interlayer bonding, relatively low growth temperature and wide range of electronic, optical and mechanical properties. These properties allow seamless back-end-of-the-line integration of novel devices, circuits and systems on a Si CMOS platform to develop complex 3D systems. This combination can not only push the performance limits of existing technologies but also enable new functionalities which current CMOS technologies cannot offer.}

^{Prof. Tomas Palacios}

^{Room 2}

^{CNT-based 3D systems: integrated sensors and imagers}

^{Tathagata Srimani}

^{Grad Student}

^{Heterogeneous Integration of BEOL Logic and Memory in a Commercial Foundry: Carbon Nanotube Logic and Resistive RAM
Monolithic three-dimensional (3D) integration enables revolutionary digital system architectures with vertically-interleaving layers of logic and memories, with dense and fine-grained connectivity. Such monolithic 3D systems promise significant (>100x) energy-efficiency improvements over conventional two-dimensional systems. Here we show BEOL integration of multi-tier carbon nanotube field-effect transistor logic and Resistive RAM within a commercial foundry at a 130 nm technology node. We also fabricate and experimentally validate a wide range of digital systems (3D imager, RISC-V microprocessor etc). All design and fabrication is VLSI-compatible and leverages existing silicon CMOS infrastructure.}

^{Prof. Max Shulaker}

^{Room 3}

^{CNT microprocessors}

^{Christian Lau}

^{Grad Student}

^{Modern Microprocessor Built from Complementary Carbon Nanotube Transistors
Electronics is approaching a major paradigm shift because silicon transistor scaling no longer yields historical energy-efficiency benefits, spurring research towards beyond-silicon nanotechnologies. In particular, carbon nanotube field-effect transistor (CNFET)-based digital circuits promise substantial energy-efficiency benefits, but the inability to perfectly control nanoscale defects and variability in carbon nanotubes has precluded the realization of very-large-scale integrated systems. Here we overcome these challenges to demonstrate a beyond-silicon microprocessor built entirely from CNFETs. The microprocessor runs standard 32-bit RISC-V instructions on 16-bit data and addresses, comprises more than 14,000 complementary CNFETs and is designed and fabricated using industry-standard design flows and processes}

^{Prof. Max Shulaker}

^{Room 4}

^{Graphene Enabled Remote Epitaxy}

^{Hyunseong Kum}

^{Post Doc}

^{Artificial single-crystaline heterostructures enabled by "remote epitaxy"
Epitaxy has been the driving force of the semiconductor industry, which allows creation of high quality single-crystalline materials that become the base of advanced electronic and photonic devices. However, epitaxy occurs on thick and rigid substrates and also require materials to be grown on wafers with similar lattice constants, which limit the possible material selections as well as prevent integration of highly dissimilar single-crystalline materials together on a single platform. Here, we solve these issues by developing a method, called remote epitaxy, which allow epitaxial growth and exfoliation of single-crystalline membranes on graphene coated substrates that allow epitaxial lift-off of a variety of compound-semiconductor materials and complex-oxides that can be easily heterointegrated onto a single platform.}

^{Prof. Jeehwan Kim}

^{Room 5}

^{Neuromorphic proton-based devices}

^{Vrindaa Somjit}

^{Grad Student}

^{Energy-Efficient Hardware for Brain-inspired Computing: Artificial Synapses Based on Proton and Oxygen Motion
Hardware neural networks that combine processing and memory in a single architecture are a promising approach for reducing the energy consumption and computation time of machine learning algorithms. However, current devices are limited by high variability and low yield. Our group is developing two all solid-state approaches to mitigating these issues. One is a protonic electrochemical synapse that changes conductivity deterministically by current-controlled shuffling of dopant protons across the active device layer. The second is controlling conducting oxygen vacancy filament formation in resistive memory devices via dopant and microstructure engineering. Both approaches provide a potential path towards brain-inspired neuromorphic computing.}

^{Prof. Bilge Yildiz}

^{Room 6}

^{Li-based Neuromorphic Materials and Devices}

^{Moran Balaish}

^{Post Doc}

^{Building Neuromorphic Computing Units with Li-based Battery Materials
Specialized hardware for neural networks requires materials with tunable symmetry, retention and speed at low power consumption. Here, we propose lithium titanates, originally developed as Li-ion battery anode materials, as promising candidates for memristive-based neuromorphic computing hardware. We investigate the controlled formation of a metallic phase (Li7Ti5O12) percolating through an insulating medium (Li4Ti5O12) with no volume changes under voltage bias, thereby controlling the spatially averaged conductivity of the device.  We present a theoretical model to explain the observed hysteretic switching behavior based on electrochemical nonequilibrium thermodynamics, in which the metal-insulator transition results from electrically driven phase separation of Li4Ti5O12 and Li7Ti5O12.}

^{Prof. Jennifer Rupp}

^{Room 7}

^{Integrated Thin-Film Batteries}

^{Michael Chon}

^{Post Doc}

^{High Capacity CMOS-compatible Thin Film Li-ion Batteries
The miniaturization of sensors through advancements in low-powered MEMS devices in integrated circuits has opened up new opportunities for thin film microbatteries. However, many of the available thin film battery materials require a high-temperature process that necessitates additional packaging volume, reducing their overall energy density. We have identified and demonstrate an all-solid-state materials system with high volumetric capacity that exclusively utilizes room temperature processes, allowing for integration of thin film batteries directly onto CMOS circuits for applications in distributed power supplies and integrated autonomous microsystems.}

^{Prof. Carl V. Thompson}

^{Room 8}

^{Growth of 2D Materials for Electronics}

^{Ji-Hoon Park}

^{Post Doc}

^{Low Temperature Synthesis of High Quality MoS2
The large-area synthesis of high-quality MoS2 plays an important role in realizing industrial applications of optoelectronics, nanoelectronics, and flexible devices. However, current techniques for chemical vapor deposition (CVD)-grown MoS2 require a high synthetic temperature and a transfer process. Here, we report the direct synthesis of high-quality monolayer MoS2 with the domain size up to 120 μm by metal-organic chemical vapor deposition (MOCVD) at a temperature of 320 oC. Owing to the low substrate temperature, the MOCVD-grown MoS2 exhibits low impurity doping and nearly unstrained properties, demonstrating enhanced electronic performance with high electron mobility of 68.3 cm2 V-1s-1 at room temperature.}

^{Prof. Jing Kong}

^{Room 9}

^{Ferroelectric materials for steep-subthreshold CMOS}

^{Taekyong Kim}

^{Grad Student}

^{Dynamics of HfZrO2 Ferroelectric Structures for Advanced Electronics: Experiments and Models
Negative capacitance (NC) effect by incorporating a ferroelectric (FE) HfZrO2 layer in the gate stack of a MOSFET has attracted substantial interest. This is due to its potential for achieving a steep subthreshold swing to overcome the CMOS scaling limit. However, NC and FE dynamics are still contentious and unclear. Therefore, we are investigating the switching dynamics of the Metal-FE HfZrO2-Metal structure by calibrating and minimizing circuit and sample parasitics. In this work, our new dynamic model based on the Preisach model describes well all observed behavior in a wide range of conditions.}

^{Prof. Jesus del Alamo}

^{Room 10}

^{Quantum computing technology I}

^{Joel Wang}

^{Post Doc}

^{Hybrid superconducting circuits based on van der Waals heterostructures
Van der Waals (vdW) materials – a family of layered crystals with various functionalities, can be assembled in specific arrangements to create new electronic devices called vdW heterostructures. The electronic properties of these heterostructures, in combination with their epitaxial precision, make vdW-based devices a promising alternative for constructing key elements of solid-state quantum computing platforms. We will discuss a voltage-tunable transmon qubit made with graphene-based vdW heterostructures, whose spectrum reflects the electronic properties of massless Dirac fermions traveling ballistically. We also study hexagonal boron nitride (hBN), a layered, dielectric crystal, in the microwave regime by integrating the material in a superconducting LC resonator to extract its microwave loss tangent.}

^{Prof. William Oliver}

^{Room 11}

^{Quantum computing technology II}

^{Bharath Kannan}

^{Grad Student}

^{Waveguide Quantum Electrodynamics with Giant Superconducting Artificial Atoms
Layered two-dimensional materials offer unique advantages for heterogeneous integration thanks to their atomically thin body, van der Waals nature of interlayer bonding, relatively low growth temperature and wide range of electronic, optical and mechanical properties. The transferable nature of these materials and the low thermal budget of their processing technology allows seamless back end of the line integration of novel devices, circuits and systems on CMOS platform to develop complex 3D systems that can not only push the performance limits of the existing technologies but also enable new functionalities which current CMOS technologies cannot offer.}

^{Prof. William Oliver}

^{Room 12}

^{3D IC Thermal Management}

^{Geoffrey Vaartstra}

^{Grad Student}

^{Tailored Optimization of Advanced Thermal Management Technologies for Hgh Performance Electronic Devices
Thermal management is a severe challenge for GaN technology and other high-performance electronics. Power densities surpassing 1-2 kW/cm2 result in localized hot spots that traditional cooling strategies cannot efficiently mitigate. We developed fast and accurate thermal models for state-of-the-art thermal management technologies that efficiently dissipate heat via evaporative cooling and ultra-low resistance to vapor transport. While many thermal models are limited to simplistic power loads, our models facilitate accurate thermal co-design by rapidly calculating temperature profiles of realistic processors. Further, we designed a machine learning model that selects optimal evaporator geometries and coolants to minimize the peak device temperature.}

^{Prof. Evelyn Wang}